1. Field of the Invention
The invention relates to a surface-mounting substrate for mounting thereon a part, such as a semiconductor device, and a structure comprising a substrate and a part surface-mounted thereon.
2. Description of the Related Art
As a substrate for mounting thereon a part, such as a semiconductor device, there have been provided a product having a laminate structure of an insulation layer(s) and a patterned wiring line layer(s) on at least a side of a core substrate.
Such a substrate is illustrated in FIG. 20, which is a plan view of a substrate for mounting a semiconductor device (not shown) by flip chip bonding, the substrate having connecting terminals 10 arranged on a surface of the substrate so as to be spaced from each other and to form an array of the terminals 10.
FIG. 21 illustrates a construction of the laminate structure of electrical insulation layers and patterned wiring line layers provided on a core substrate 20. The laminated structure comprises first and second inner wiring line layers 12a, 12b, and an outermost wiring line layer 12, which are formed so as to have certain patterns. The first inner wiring line layer 12a is provided on a side of the core substrate 20, and the second inner layer 12b and the outermost wiring layer 12 are separated from the first inner layer 24a and the second inner layer 24b by insulation layers 22a and 22b, respectively. The wiring lines in the adjacent layers are connected to each other by vias 12a, 12b which are formed in the respective insulation layers 22a, 22b. A through hole 26 is formed in the core substrate 20, and effectively employed for substrates having connecting terminals arranged at a small pitch of, for instance, 100 micrometers or less.
The connecting terminal 10 is formed in an elongated shape, as clearly seen in FIG. 20. The site of the terminal 10, to which an electrode terminal of a semiconductor device (not shown) is to be bonded, is at the end portion of the terminal 10 (i.e., on the line X-Xxe2x80x2 in the drawing). The reason why the connection terminal 10 is formed in an elongated shape is that variation in the amount of solder to be coated to the respective connecting terminals 10 must be restrained to reliably bond the electrode terminal of a semiconductor device to the connecting terminal 10 of the substrate.
The coating of the solder 14 to the surface of the connecting terminal 10 is carried out by a method in which a powder of solder is placed on the connecting terminal 10, and flux is then applied to the solder, after which the solder is coated to the terminal 10 by a reflow process. The method of coating solder to a connecting terminal using a powder of solder is effectively employed for substrates having connecting terminals arranged at a small pitch of, for instance, 100 micrometers or less.
However, when the connecting terminals 10 are arranged with a smaller gap, such as about 30 micrometers, a problem that solder materials on adjacent terminals 10 form bridges when they are fused in a reflow process, resulting in short-circuit between the adjacent terminals 10, arises. FIG. 22 illustrates a
mounting substrate having a bridge structure 14a of solder materials on the adjacent connecting terminals 10, which is formed during a reflow process. In conventional surface-mounting substrates, the side faces of the connecting terminal 10 are exposed, and the solder material 14 provided on the top surface of the terminal 10 can be coated not only to the top surface of the terminal 10 but also to the exposed side faces thereof during a reflow process. Short-circuits between the adjacent terminals 10 due to such bridge structures of solder materials tend to occur when the space between adjacent terminals 10 becomes smaller.
In addition, conventional surface-mounting substrates also have a problem that variation in the thicknesses (heights) of the connecting terminals 10 causes variation in the amounts of solder materials on the terminals 10, which in turn causes variation in the heights of the solder materials after coated to the terminals 10.
These problems cannot be overlooked in order to provide a miniaturized semiconductor product having an increased number of pins by which the product is to be mounted on a substrate.
Conventional surface-mounting substrates further have a problem that inner layers of patterned wiring lines in a build-up structure are designed based only on wiring schemes, line widths, and line gaps in the respective layers, without considering densities of lines in the respective layers, and, accordingly, the thickness of an insulation layer formed on a layer of wiring lines is varied from a region located on the region of wiring lines at a higher density to a region located on the region of wiring lines at a lower density, which results in poor planarity at the top surface of a product substrate. When flip chip bonding is used to mount a semiconductor device on a substrate, poor planarity at a region of the substrate on which the device is to be mounted gives rise to a problem of unsatisfactory bonding between the semiconductor device and the substrate.
An object of the invention is to solve the above problems by providing a substrate for surface-mounting a semiconductor device thereon, in which electrical short-circuits between connecting terminals due to bridging of solder materials coated to the terminals can be prevented, even when the connecting terminals are arranged at a very small distance, and variation in thicknesses of the solder materials due to variation in thickness (height) of the terminals can be also prevented, to thereby improve reliability of electrical connections in a structure comprising a substrate and a semiconductor device mounted thereon, and which substrate can also improve reliability of the mounting of semiconductor device by its surface having a good planarity for mounting the device thereon. It is also an object of the invention to provide a structure comprising such a substrate and a semiconductor device or the like mounted thereon.
According to the invention, there is provided a surface-mounting substrate for mounting thereon a part, such as a semiconductor device, which comprises a core substrate, a plurality of layers of patterned wiring lines, which are separated from each other by an insulation layer interposed therebetween, vias piercing through the insulation layer to connect the wiring lines at the layers adjacent to each other, and a layer of connecting terminals to mount a part on the surface-mounting substrate, each of the connecting terminals connecting with the wiring line at the outermost layer of wiring lines, wherein the connecting terminal is filled in an outermost insulation layer provided at the surface of the surface-mounting substrate, and has a surface exposed at substantially the same level as the level of the surface of the outermost insulation layer.
The surface-mounting substrate of the invention may be provided on the surface of each of the connecting terminals with a conductor material, such as a solder material, bonded thereto.
In an embodiment of the surface-mounting substrate according to the invention, the layer of the connecting terminals is separated from the outermost layer of wiring lines by an insulation layer interposed therebetween, and the connecting terminal is connected with the wiring line at the outermost layer of wiring lines through a via piercing through the insulation layer separating the layer of the connecting terminals from the outermost layer of wiring lines.
In another embodiment of the surface-mounting substrate according to the invention, the connecting terminal is directly connected with the wiring line at the outermost layer of wiring lines located under the layer of connecting terminals.
In a further embodiment of the surface-mounting substrate according to the invention, the connecting terminal is directly connected with the wiring line at the outermost layer in the surface-mounting substrate, and the wiring lines at the outermost layer is covered with a cover material.
Preferably, the connecting terminals are arranged at a pitch of 100 micrometers or smaller and at a spacing distance of 20 micrometer or larger.
In the surface-mounting substrate of the invention, conductive members in an area, over which the part is mounted, of the outermost layer of wiring lines connected with the connecting terminals may be arranged at a uniform density as a whole. The conductive members include the wiring lines and the connecting terminals, and, if any, other conductive members, such as a power supply plane and a grounding plane.
Preferably, conductive members in the area, over which the part is mounted, of each of the layers of wiring lines located below the outermost layer of wiring lines connected with the connecting terminals are arranged at a uniform density as a whole. The conductive members include the wiring lines and the vias, and, if any, other conductive members, such as a power supply plane and a grounding plane. More preferably, the conductive members at each of the layers of wiring lines below the outermost layer of wiring lines are arranged at substantially the same density as the density of conductive members at the outer most wiring lines.
The surface-mounting substrate may have dummy members at at least one of layers of wiring lines, so as to exclusively contribute to equalization of density of wiring lines thereat.
The surface-mounting substrate may also comprise a common plane, such as a power supply plane or a grounding plane, located at at least one of the layers of wiring lines, the common plane being in a mesh-like shape or having slits.
In general, the wiring lines have a width of 20 to 200 micrometers, and are arranged at a pitch of 60 to 300 micrometers.
In general, the vias have a diameter of 0.05 to 0.6 millimeter.
The core substrate may have through holes to connect a wiring line at one side of the substrate to another wiring line at the other side, the through holes having, in general, a diameter of 0.2 to 0.6 millimeter, and being arranged in a pitch of 0.5 to 1.5 millimeters.
In a case such that the problem of poor planarity of the surface of a surface-mounting substrate at a region on which a part, such as a semiconductor device, is to be mounted is to be solved chiefly or exclusively, the surface-mounting substrate of the invention is simply characterized in that conductive members in an area, over which the part is mounted, of an outermost layer of wiring lines are arranged at a uniform density as a whole. Thus, in another aspect, the invention provides a surface-mounting substrate for mounting a part thereon, which comprises a core substrate, a plurality of layers of patterned wiring lines, which are separated from each other by an insulation layer interposed therebetween, vias piercing through the insulation layer to connect the wiring lines at the adjacent layers to each other, and a layer of connecting terminals to mount a part on the surface-mounting substrate, wherein conductive members in an area, over which the part is mounted, of an outermost layer of wiring lines are arranged at a uniform density as a whole.
The invention also provides a structure comprising a surface-mounting substrate and a part mounted thereon, the surface-mounting substrate comprising a core substrate, a plurality of layers of patterned wiring lines, which are separated from each other by an insulation layer interposed therebetween, vias piercing through the insulation layer to connect the wiring lines at the adjacent layers to each other, and a layer of connecting terminals to mount the part on the surface-mounting substrate, each of connecting terminals connecting with the wiring line at the outermost layer of wiring lines, and the part having bumps, and being mounted on the substrate through the bumps bonded to the respective connecting terminals, wherein the connecting terminal of the surface-mounting substrate is filled in an outermost insulation layer provided at the surface of the surface-mounting substrate, and has a surface exposed at substantially the same level as the level of the surface of the outermost insulation layer.
The invention further provides a structure comprising a surface-mounting substrate and a part mounted thereon, the surface-mounting substrate comprising a core substrate, a plurality of layers of patterned wiring lines, which are separated from each other by an insulation layer interposed therebetween, vias piercing through the insulation layer to connect the wiring lines at the adjacent layers to each other, and a layer of connecting terminals to mount a part on the surface-mounting substrate, wherein conductive members in an area, over which the part is mounted, of an outermost layer of wiring lines are arranged at a uniform density as a whole.